LOOPS=0, UARTSWAI=0, M=0, ILT=0, PT=0, RSRC=0, WAKE=0, PE=0
UART Control Register 1
| PT | Parity Type 0 (0): Even parity. 1 (1): Odd parity. |
| PE | Parity Enable 0 (0): No hardware parity generation or checking. 1 (1): Parity enabled. |
| ILT | Idle Line Type Select 0 (0): Idle character bit count starts after start bit. 1 (1): Idle character bit count starts after stop bit. |
| WAKE | Receiver Wakeup Method Select 0 (0): Idle-line wakeup. 1 (1): Address-mark wakeup. |
| M | 9-Bit or 8-Bit Mode Select 0 (0): Normal - start + 8 data bits (lsb first) + stop. 1 (1): Receiver and transmitter use 9-bit data characters start + 8 data bits (lsb first) + 9th data bit + stop. |
| RSRC | Receiver Source Select 0 (0): Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the UART does not use the RxD pins. 1 (1): Single-wire UART mode where the TxD pin is connected to the transmitter output and receiver input. |
| UARTSWAI | UART Stops in Wait Mode 0 (0): UART clocks continue to run in wait mode so the UART can be the source of an interrupt that wakes up the CPU. 1 (1): UART clocks freeze while CPU is in wait mode. |
| LOOPS | Loop Mode Select 0 (0): Normal operation - RxD and TxD use separate pins. 1 (1): Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input. (See RSRC bit.) RxD pin is not used by UART. |